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Mike Schnecker (Business Development Manager, Rohde & Schwarz)
Date: Wednesday, April 18
Time: 11:00am - 11:45am
Vault Recording: TBD
A primary contributor to timing jitter on clock signals is noise on the power plane. The primary sources of this noise are switching transients on the power supply and PDN impedance flatness. This session will cover oscilloscope methods for evaluating noise on power rails and the relationship between this noise and jitter. Sponsored by: Rohde & Schwarz.